The present invention relates to a technique of stabilizing reference voltages for use in analog-to-digital (A/D) conversion in A/D converters for converting analog signals into digital signals and in on-chip A/D converters equipped with local A/D converters and local D/A converters, and more particularly to a technique that can be effectively used in, for instance, ΣΔ (sigma delta) type A/D converters and semiconductor integrated circuits with such converters built into them.
A wireless communication system, such as a cellular phone, usually comprises a semiconductor integrated circuit (RF-IC) having functions to modulate transmit signals and to demodulate receive signals, another semiconductor integrated circuit, such as a baseband circuit for converting transmit data into I signals in the same phase as the fundamental wave and Q signals orthogonal to the same and restoring data by processing the I and Q signals resulting from the demodulation of receive signals, and a power module, including a power amplifier, for power-amplifying transmit signals and outputting them from an antenna. In many past cases, the I and Q signals conveyed between the RF-IC and the baseband LSI were analog signals.
On the other hand, the baseband LSI, wherein most internal processing is digitally accomplished, is usually provided on its part with an A/D converter for converting receive analog I and Q signals which have been inputted into digital signals and a D/A converter for converting transmit digital I and Q signals into analog signals. In this case, since the baseband LSI, in spite of being mostly a digital circuit, has the A/D converter and the D/A converter, which are analog circuits, built into it, the LSI manufacturing process involves steps of forming elements to constitute the analog circuits, inviting a disadvantage that the chip cost correspondingly rises.
In view of this problem, the present inventors studied the possibility of equipping the RF-IC side with an A/D converter and a D/A converter, and conveying I and Q signals in a digital form between the RF-IC and the baseband LSI. The presence of the A/D converter and the D/A converter on the RF-IC side eliminates the need for an A/D converter and a D/A converter on the baseband LSI side and the need for a step of fabricating analog circuit elements in the manufacturing process, both contributing to reducing the chip cost. At the same time, the high-gain amplifier circuit and the filter which would otherwise be required downstream from the demodulator in the reception-related circuits of the RF-IC can be dispensed with, making it possible to reduce the chip size.
By digitizing the I signals and the Q signals, the signal-to-noise (SN) ratio can be improved. The addition of an A/D converter and a D/A converter to the RF-IC side does not entail so great an extra cost as the arrangement of an A/D converter and a D/A converter on the baseband LSI side, because the RF-IC essentially has analog circuits and the additional analog circuit does not complicate the process though it involves an increase in chip size.
Already, various types of A/D conversion circuits have been developed, including the sequential comparison type and the over-sampling type. Generally speaking, where analog input signals are to be converted into digital signals with an A/D conversion circuit, the S/N characteristics in the vicinities of the signal frequency can be enhanced by setting the sampling frequency high. The over-sampling type A/D conversion circuit improves the S/N characteristics by setting a high ratio of the over-sampling ratio (the ratio of the Nyquist rate (1/2 of the sampling frequency) to the frequency of the signal band).
Over-sampling type A/D conversion circuits can be broadly classified into the Δ (delta) modulation type, the ΣΔ modulation type and their combination. Of these types, the ΣΔ modulation system integrates the difference between the output signal and the input signal with an integrator, and performs feedback control to minimize the output of this integrator. In this ΣΔ modulation system, the S/N characteristics can be further improved by increasing the order of analog integration, i.e. the number of integrators. Thus, every time the order of analog integration is increased by one, noise shaping performance substantially in inverse proportion to the square of the over-sampling ratio can be expected.
The present inventors considered an over-sampling type A/D conversion circuit, especially an A/D conversion circuit of the ΣΔ modulation system (hereinafter referred to as ΣΔ A/D conversion circuit), to be most suitable, in respect of the accuracy and speed of modulation, as the A/D conversion circuit to be built into the RF-IC for converting I and Q signals demodulated by the demodulator into digital signals. Inventions relating to conversion of I and Q signals demodulated by a demodulator into digital signals with a ΣΔ A/D conversion circuit provided on the RF-IC and their communication to a baseband circuit include one described in Patent Reference 1 for instance.
Another invention under a prior application related to the present invention is disclosed in Patent Reference 2. The publication of this earlier invention discloses a configuration in which a capacitance element is connected between the output terminals of reference voltage generators for generating differential reference voltages in a switched capacitor type A/D conversion circuit, but according to this prior invention capacitance elements are also connected between an inverted output terminal and a grounding point and a non-inverted output terminal and a grounding point. However, the publication makes no mention of reducing the number of stabilization capacitances or their capacitances or keeping constant the difference between the two reference voltages. Therefore, this earlier invention entirely differs in underlying idea from the invention under the present application.
Patent Reference 1: Japanese Patent Application Laid-Open No. 2002-368621
Patent Reference 2: Japanese Patent Application Laid-Open No. 2000-201054